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PMX-P

XMC/VITA 42.3 PCI Express (PCIe) to PCI/PCI-X Adapter Board

 




Features
  • x1, x2 and x4 PCI Express 1.1 (PCIe) compatibility
  • 32 and 64-bit PCI/PCI-X compatibility
  • PCI-X support up to 64-bit, 133 MHz
  • Test Points and Power and Status LEDs
  • XMC Pn6 and PMC Pn4 I/O connectors follow VITA 46.9
     

Applications

  • Eases debugging of PCIe boards
  • Enable use of the latest PCIe boards in older PCs

 

 

Download PMX-P Datasheet

Download PMX-P Manual

  

 

The PMX-P is a single site XMC/VITA 42.3 (PCI Express (PCIe) to PCI/PCI-X adapter board. It enables a x1, x2, or x4 XMC/VITA 42.3 board module to be plugged into any Universal PCI 2.3 32 or 64-bit PCI or PCI-X slot.

The PMX-P features the Pericom PI7C9X130 PCI Express to PCI-X Reversible Bridge. Among others, the PI7C9X130 is compliant with the PCI Express Base Specification, Revision 1.1 and the PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0. PI7C9X130 supports transparent and non-transparent mode of operations.

The PI7C9X130 is used on the PMX-P as a reverse bridge (PCIe to a PCI/PCI-X host system). In reverse bridge mode, PI7C9X130 has a 64-bitPCI-X upstream port and an x4 PCI Express downstream port (2.5Gb/s data rate). PI7C9X130 configuration registers are backward compatible with existing PCI bridge software and firmware. No modification of PCI bridge software and firmware is required.

The PMX-P's conventional (PCI/PCI-X) connector is Universal PCI2.3/PCI-X 1.0 compatible. It supports 32 or 64 bit data, 33 or 66 MHz (PCI and PCI-X), 100 and 133 MHz (PCI-X), and 3.3V or 5V VIO signaling. The PMX-P interface is 5V I/O tolerant and, in keeping with PCI 2.3,the I/O buffers are powered by a 3.3V supply.

The board's XMC/VITA 42.3 site supports x1, x2, or x4 PCIe 1.1 boards. Boards with x8 or x16 can also be installed but only a x4 path is supported.

XMC Pn4 (PMC) and Pn6 (XMC) rear-panel I/O connector access is provided: Pn4 follows VITA 46.9 "P64S" routing. The signals are connected as 32 matched-length pairs to a 68-pin VHDCI connector. Pn6 follows a modified VITA 46.9 "X8+12d38s" routing. The signals are connected as 39 matched-length pairs to two 68-pin VHDCI connectors.

Separate power planes are provided for +3.3V, +1.8V (PI7C9X130 core), and ground. Bypass capacitors are located at regular intervals across the board and at all connector power pins.

To aid in debugging, the PMX-P has Test Point pins and LED indicators for all major power sources, +12V, -12V, +5V, +3.3V, a variety of +1.8V sources, and VIO.

Jumpers allow the user to select either +5 or +12 for the XMC VPWR pins. VPWR power is limited to about 12W via a Polyswitch resettable fuse.

Due to the fact that the PI7C9X130 BGA footprint is laid out to support optimal placement in a PCI/PCI-X to PCIe adapter (the reverse of the PME-P), the PCI bus signal lengths must unavoidably exceed the PCI 2.3 standard. There is no bridge chip made that is optimized for PCIe to PCI/PCI-X. However, the extra length has not been found to be a problem on the PMX-P, even when tested at 133 MHz PCI-X on a high-quality extender card.


 

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